Design Optimization and Realization of 4H-SiC Bipolar Junction Transistors [Elektronisk resurs]

• 4H-SiC-based bipolar junction transistors (BJTs) are attractive devices for high-voltage and high-temperature operations due to their high current capability, low specific on-resistance, and process simplicity. To extend the potential of SiC BJTs to power electronic industrial applications, it is essential to realize high-efficient devices with high-current and low-loss by a reliable and wafer-scale fabrication process. In this thesis, we focus on the improvement of the 4H-SiC BJT performance, including the device optimization and process development. To optimize the 4H-SiC BJT design, a comprehensive study in terms of cell geometries, device scaling, and device layout is performed. The hexagon-cell geometry shows 42% higher current density and 21% lower specific on-resistance at a given maximum current gain compared to the interdigitated finger design. Also, a layout design, called intertwined , is used for 100% usage of the conducting area. A higher current is achieved by saving the inactive portion of the conducting area. Different multi-step etched edge termination techniques with an efficiency of >92% are realized. Regarding the process development, an improved surface passivation is used to reduce the surface recombination and improve the maximum current gain of 4H-SiC BJTs. Moreover, wafer-scale lift-off-free processes for the n- and p-Ohmic contact technologies to 4H-SiC are successfully developed. Both Ohmic metal technologies are based on a self-aligned Ni-silicide (Ni-SALICIDE) process. Regarding the device characterization, a maximum current gain of 40, a specific on-resistance of 20 mΩ·cm 2 , and a maximum breakdown voltage of 5.85 kV for the 4H-SiC BJTs are measured. By employing the enhanced surface passivation, a maximum current gain of 139 and a specific on-resistance of 579 mΩ·cm 2 at the current density of 89 A/cm 2 for the 15-kV class BJTs are obtained. Moreover, low-voltage 4H-SiC lateral BJTs and Darlington pair with output current of 1−15 A for high-temperature operations up to 500 ° C were fabricated. This thesis focuses on the improvement of the 4H-SiC BJT performance in terms of the device optimization and process development for high-voltage and high-temperature applications. The epilayer design and the device structure and topology are optimized to realize high-efficient BJTs. Also, wafer-scale fabrication process steps are developed to enable realization of high-current devices for the real applications. 

Ämnesord

Engineering and Technology  (hsv)

Electrical Engineering, Electronic Engineering, Information Engineering  (hsv)

Teknik och teknologier  (hsv)

Elektroteknik och elektronik  (hsv)

Electrical Engineering  (kth)

Elektro- och systemteknik  (kth)

Informations- och kommunikationsteknik  (kth)

Information and Communication Technology  (kth)

Indexterm och SAB-rubrik

4H-SiC

BJT

high-voltage and ultra-high-voltage

high-temperature

self-aligned Ni-silicide (Ni-SALICIDE)

lift-off-free

wafer-scale

current gain

Darlington